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Prototype2025
HardwareDSPPCB Design

SuperMic

A MEMS microphone array that listens better than you'd expect

S

PCB photo or polar pattern measurement plot

photo / screenshot coming soon

Why I built this

I was frustrated by how badly smart speakers perform when there's background noise — a problem I ran into working on a voice-interface project. Instead of working around cheap microphones, I wanted to understand the hardware deeply enough to build my own solution from the silicon up.

Overview

SuperMic is a custom MEMS microphone array with onboard signal processing, built for reliable far-field voice capture in noisy environments. The focus is on the full stack: PCB design, acoustic array geometry, and digital beamforming — not just plugging in off-the-shelf components.

The Problem

What's broken

Commercial far-field microphone arrays sacrifice either cost or performance. Cheap arrays rely on the host processor for all DSP. High-quality arrays are opaque black boxes. I wanted to understand every layer and optimize for a specific use case.

The Solution

What I built

A custom 4-mic MEMS array on a designed PCB, paired with an onboard FPGA that handles real-time beamforming and noise suppression before any audio leaves the board. The result is clean, directional audio even in acoustically challenging environments.

Technical Approach

PCB designed in KiCad with careful attention to microphone placement geometry for beamforming effectiveness. The FPGA (Lattice iCE40) runs a delay-and-sum beamformer implemented in SystemVerilog. I wrote custom Python tools for calibration and polar pattern measurement in my makeshift anechoic setup.

Stack

KiCadSystemVerilogLattice iCE40 FPGAPythonMEMS MicrophonesI2S / PDM

Process

1

Acoustic Research

Studied beamforming theory and array geometry tradeoffs for far-field voice

2

PCB Design v1

First board in KiCad — 4-mic layout with iCE40 FPGA and power management

3

FPGA Firmware

Implemented delay-and-sum beamformer in SystemVerilog on iCE40

4

Measurement & Tuning

Built calibration rig, measured polar patterns, iterated on array geometry

5

PCB v2

Revised layout based on signal integrity findings from v1 testing

Results & Impact

  • Functional 4-mic array with real-time FPGA beamforming
  • Measurable directivity improvement over single-mic baseline
  • PCB v2 currently being fabricated
  • Planning voice activity detection (VAD) as next FPGA module
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